The g m /I D Methodology, a Sizing Tool for Low-Voltage Analog CMOS Circuits: The Semi-Empirical and Compact Model Approaches
Paul G. A. Jespers, Université Catholique de Louvain
Springer International Publishing, 2010
ISBN: 978-0-387-47100-6;
Language: English
Written for beginners as well as professionals, this book provides a methodology for fixing currents and transistor widths of CMOS analog circuits to meet specifications such as gain-bandwidth while optimizing attributes such as low power and small area. Special attention is given to low-voltage circuits. Topics covered include sizing the intrinsic gain stage, graphical interpretation of the charge sheet model, compact modeling, and the real intrinsic gain stage. This text is also available as an e-book (ISBN 978-0-387-47101-3).
A chapter on MATLAB is included in an appendix.
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